Socrate team

2nd year

FIR filter

FPGA

computing just right

Florent de Dinechin

INRIA

Many digital filters and signal-processing transforms can be expressed as a sum of products with constants (SPC).

This poster presents the automatic construction of low-precision, but high accuracy FIR filter architectures: these architectures are specified as last-bit accurate with respect to a mathematical definition. In other words, they behave as if the computation was performed with infinite accuracy, then rounded only once to the low-precision output format. This eases the task of porting double-precision code (e.g. Matlab) to low-precision hardware or FPGA. The construction of the most efficient architectures obeying such a specification, introducing several architectural improvements to this purpose is also presented.

This approach is demonstrated in a generic, open-source architecture generator tool built upon the FloPoCo framework.